On Thu, Feb 13, 2003 at 08:39:39AM -0800, Matt Thomas wrote:

 > >Basically, the CPU should not even try to access DMA memory (read *or* 
 > >write)
 > >while the device "owns" it (i.e. between PRE and POST ops).
 > 
 > Not always possible.  Think mbufs with >1 reference counts.

It's basically an invariant that an mbuf being written to has only one
reference.  And for an mbuf being read from, there is no danger in causing
the device to get inconsistent data, because if the mbuf has > 1 reference,
no one is allowed to write to it.

-- 
        -- Jason R. Thorpe <thorpej@wasabisystems.com>