>Jason R Thorpe wrote:
> 	On platforms which implement reordered stores, bus_dmamap_sync()
> 	will always cause the store buffer to be flushed.


Yes - but bus_dmamap_sync()  is supposed to be called with BUS_DMASYNC_PREXXXX 
BEFORE and
with BUS_DMASYNC_POSTXXXX AFTER a DMA transfer.

This requires the driver to know when the DMA operation has actually completed.

Normally this is not a problem as the device driver can find out if the DMA
completed by accessing device memory or ports using the bus_space interface.

However some devices post the completion of the DMA access by DMA.
On these devices the driver
	- Can not find out about DMA completion before calling bus_dmamap_sync with
	  BUS_DMASYNC_POSTXXXX flags
	- Can not call bus_dmamap_sync with BUS_DMASYNC_POSTXXXX until it knows
	  that the DMA completed.
Catch 22 !

The i82257 driver ignores this problem and just illegally calls 
bus_dmamap_sync with
BUS_DMASYNC_POSTXXXX flags with full knowledge that the DMA might not have 
completed.
( When it finds out that the DMA did not complete it just calls bus_dmamap_sync
again with BUS_DMASYNC_PREXXXX op flags)

In my opinion NetBSD needs a few more dmap functions that can access DMA memory
between     bus_dmamap_sync (.. BUS_DMASYNC_PREXXXX..)  
	and bus_dmamap_sync (.. BUS_DMASYNC_POSTXXXX..)

Examples:

u_int32_t	
bus_dmamap_read_4 (bus_dma_tag_t tag, bus_dmamap_t dmam, bus_addr_t offset)

void
bus_dmamap_write_4 (bus_dma_tag_t tag, bus_dmamap_t dmam, bus_addr_t offset, 
u_int32_t value)


The additional functions SHOULD probably implement memory barriers or a special
memory barrier function needs to be implemented.

In addition to normal memory access some device drivers might need or benefit 
from atomic operations on DMA accessed memory.
( Atomic set / clear bits, compare and exchange .... ) 

Again, did I miss anything?

Stephan



>Jason R Thorpe wrote:
> On Tue, Feb 11, 2003 at 12:54:03AM -0500, Stephan Uphoff wrote:
> 
>  > bus_dmamap_sync not enough for some devices ?
> 
> bus_dmamap_sync is supposed to also provide any necessary memory barriers.
> From the bus_dma(9) manual page:
> 
> 	.
> 	.
> 	.
> 	On platforms which implement reordered stores, bus_dmamap_sync()
> 	will always cause the store buffer to be flushed.
> 	.
> 	.
> 	.
> 
> The wording might not be the best, there, but I think the intent is clear
> (particularly because of the use of the word "reordered").
> 
> -- 
>         -- Jason R. Thorpe <thorpej@wasabisystems.com>
> 


----------------------
Stephan Uphoff 
ups@stups.com
9275 Martin Road
Roswell, GA 30076
770-518-4058