Subject: Re: PXA250 Xscale and page tables
To: Jason R Thorpe <firstname.lastname@example.org>
From: Steve Woodford <email@example.com>
Date: 02/02/2003 23:17:25
On Sun, 2 Feb 2003, Jason R Thorpe wrote:
> In an older version of NetBSD's UBC (unified buffer cache), these writable
> mappings were kept around in case they were needed again later, lazily
> replaced when new UBC mappings were needed. This led to degraded performance
> on VIVT platforms (like the ARM) because there was a kernel-writable mapping
> of these pages.
> This was fixed, however, in Jan 2002, and the fix was thus in the
> 1.6 release. What version of NetBSD are you using?
This thread has reminded me about something I have occasionally noticed on
sh5. While checking the TLB, I have noticed some cache-inhibited mappings
right at the start of text. (sh5 has a VIVT I$, and a similar "vac me
harder" type routine in the pmap)
I previously put this down to a problem in the sh5 pmap, but perhaps there
is a more general problem here.