Subject: Re: osiop and the 53c700
To: None <fredette@theory.lcs.mit.edu>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: tech-kern
Date: 07/11/2002 23:05:06
In <200207101723.g6AHN5x16098@mynah.lcs.mit.edu>
fredette@theory.lcs.mit.edu wrote:

> The most significant architectural difference between the two chips is 
> the 53c710's memory-indirect addressing mode.  The 53c710 has a register 
> that the unmodified osiop driver fills with a pointer to an array of 
> <pointer, length> pairs for the various buffers used in a SCSI command.
>
> In my patch I simply abstract out the loading of this register into a 
> function.  On a 53c710, it does the normal register load.  On a 53c700, 
> the <pointer, length> pairs are instead broken out and copied into the 
> appropriate instructions in the script.

I agree that 700 and 710 have many similar functions,
but I would still like to have separated drivers for them.
Of course some sources could be shared between them, so
how about the approach of current siop and esiop?

Linux and Lites use the same drivers for 700 and 710, but
I guess it's because they use 53c700 compatible mode on 710.

> This patch also supports systems where the 53c7[01]0 is not the same 
> endianness as the CPU, as is often the case on hp700, and may be the 
> case on other systems.

53c700 does not have "big endian mode," so we don't have to
switch "byte lane" dynamically with it. All things we should do
is using htoleXX()/leXXtoh() functions for values passed via DMA.
This is another reason I'd like different drivers for them.

On the other hand, 53c710 can actually switch its endianness,
so we might have to switch byte-lane on register access.
But I guess the only case we should do it is with EISA adapters
on big-endian machines (which could happen on hp700).
I'm not sure how much penalty would be caused by dynamic
byte-switching, but it might be better to enable it only if
NOSIOP_EISA (or other particular adapters) is more than zero.
---
Izumi Tsutsui
tsutsui@ceres.dti.ne.jp