On Wed, Jul 03, 2002 at 06:35:07PM -0700, Jason R Thorpe wrote:

 > The ARM could use it, too.  The SWP instruction isn't available on
 > all ARM CPUs (older ARM2s lack it), and to make things even happier,
 > the SWP instruction is not necessarily guaranteed to be atomic on
 > a non-cacheable region.

Sorry, SWP not guaranteed atomic if not used on a non-cacheable region.

A.k.a. not guaranteed atomic on cacheable region.

There :-)

 > Is the code somewhere where we can peek at it?  How much of it can
 > be reasonably made MI?  I suppose the registration function and the
 > RAS list on the proc structure, and the lookup function...

Also, I just remembered... e.g. Solaris uses restartable sequences in
some critical sections in their mutex primitives, to save expensive
PSR maniuplation on the sparcv8.  The same would be useful in NetBSD
for the same reason, on sparcv8, ARM, etc.

So, I think I'd like to see this stuff in the tree in some MI form.

-- 
        -- Jason R. Thorpe <thorpej@wasabisystems.com>