Subject: Re: common pmap for TLB (non-hardware pagetable) processors?
To: None <matt@3am-software.com>
From: None <cgd@broadcom.com>
List: tech-kern
Date: 07/02/2002 09:02:06
At Tue, 2 Jul 2002 15:58:08 +0000 (UTC), "Matt Thomas" wrote:
> For processors like MIPS and the Motorola PPC860 which have no defined
> hardware page table and so software is free to create there own, it would
> be nice if we could come up a common set of routines that would ease
> implementation of such a pmap.
> 
> Does this seem a good idea?

in theory, possibly.  in practice, who knows.

What do you think would go into said routines?

I'm concerned that, for isntance, if you define too many data
structures generically, it will cost efficiency...

Does the PPC860 have a real TLB, and enough entries, and a translation
architecture such that doing a "virtual page table" is practical,
desirable?  (Doing that is fairly desirable, on MIPS.)


chris