Subject: pcmcia timing information
To: None <tech-kern@NetBSD.ORG>
From: Martin Husemann <martin@duskware.de>
List: tech-kern
Date: 03/01/2002 08:52:31
I need a pointer to source or some background information.

As some of you noticed I'm working on getting pk's driver for "nell* at sbus?"
working (a pcmcia adaptor). This thing is highly configurable and I have a
few tweaks I'd like to fill in correctly.

This timings are all in cycles, which is defined by the sbus frequency
that I can get from sa_frequency in the sbus attach args.

The things I need to fill in are:

 CMDDLY - the number of cycles before Cn_OE, Cn_IORD, Cn_WE, Cn_IOWR
          get active after CE is active (if I read the diagrams correctly).
	  Hope this names match the standard ones.
 CMDLNG - the number of cycles the above mentioned command strobe stays
          active

and optionally

 WAITDLY- wait after cmd strobe done for read
 RECDLY - wait after cmd strobe done for write

I know how to put this values into the controller. I know how to convert
nano seconds into the proper cycle counts.

I have no clue how to calculate the nano second delay values.

I see there are CIS tuples defined for some PCMCIA_DSPEED_* things, but we
do not use that values when we find them in the card.

I see the pcmcia function has a "wait required" flag, but AFAICT it is not
passed to the pcmcia chipset driver.

Do we just not use these values and go with safe (i.e. slow) defaults?

Any hints apreciated, TIA

Martin