----- Original Message ----- 
From: "TAKEMURA Shin" <takemura@netbsd.org>
To: <eeh@netbsd.org>; <tech-kern@netbsd.org>
Sent: Sunday, October 21, 2001 10:15 AM
Subject: Re: 16bit aligned NS16550 variant


> ----- Original Message ----- 
> From: <eeh@netbsd.org>
> To: <takemura@netbsd.org>; <tech-kern@netbsd.org>
> Sent: Sunday, October 21, 2001 5:58 AM
> Subject: Re: 16bit aligned NS16550 variant
> >  Or you can
> > rewrite the bus_space_{read,write}*() macros for your specific port
> > to vector through function pointers.
> > 
> > But there is no reason to make all architectures pay this price.
> 
> Wojciech Puchar said there was a extension card which have 16bit
> aligned registers. You should suppose that variants could be found
> on ISA, PCI, PCMCIA and so on. My chip is actually found on ISA bus.

I found that the bus_space_ approach has a problem if you found 16bit
aligned serial chip variant on generic PnP bus like PCMCIA or PCI.
The problem is that a bus frontend for the chip can't provide it's
own bus space because frontend code lives in MI part while bus_sapce
stuff is completely machine dependent. So you need my patch.

Anyone can solve the problem and show a PCMCIA (or PCI) sample
frontend with bus_space magic?
I think the function vector in bus_space_tag shuld be MI, however,
it is too hard to rewrite all bus_space_tag of all machines at onece.

Takemura