Subject: Re: 16bit aligned NS16550 variant
To: , <>
From: TAKEMURA Shin <>
List: tech-kern
Date: 10/21/2001 10:15:02
----- Original Message ----- 
From: <>
To: <>; <>
Sent: Sunday, October 21, 2001 5:58 AM
Subject: Re: 16bit aligned NS16550 variant

> | I'd like to change NS16550 serial driver, 'com' to add 16bit register
> | access support. And I've made the patch(attached).
> |
> | Some embedded companion chip and ASIC have UART compatible
> | function but you must make 16bit access for thier registers.
> I object.
> You can take a look at how other ports handle the problem of accessing
> com registers when they have a stride of 16-bits by adding some address
> twiddling inside the bus_space_{read,write}*() macros.

I've found those drivers for NS16550 variant using bus_space_* before 
I made the patch and I thought that they were adhoc and dirty hack:-)
But now I think both, bus_space approach and my patch, are OK for me.

>  Or you can
> rewrite the bus_space_{read,write}*() macros for your specific port
> to vector through function pointers.
> But there is no reason to make all architectures pay this price.

Wojciech Puchar said there was a extension card which have 16bit
aligned registers. You should suppose that variants could be found
on ISA, PCI, PCMCIA and so on. My chip is actually found on ISA bus.

I could rewrite bus_space macros for hpcmips. But I found that i386 have
bus_space macros w/o function table too. Could anyone rewrite the 
macros? I'm inexperienced in i386 port.

And I think bus_space stuff should be divided into MI/MD parts if you 
solve machine independent chip issue like register arrangement with
bus_space macros.