Subject: Re: siop LE only?
To: None <email@example.com>
From: Izumi Tsutsui <firstname.lastname@example.org>
Date: 10/08/2001 11:29:23
In article <email@example.com>
> >I notice that the siop register offset definitions only apply to little endian
> >bus modes of the siop chips, e.g. PCI, while the chips in the Amiga (53c770,
> >53c710) are connected in big endian chip mode.
> >I wonder what to do about this - if it was only for the sake of Amiga, using
> >a special bus_space that does translations should work fine. But are there
> >any other non-PCI siop out there in NetBSD land, that would need a generic
> >solution? Or would they do the same bus_space abusing?
> osiop is used in mvme68k...
MI osiop works on big endian if the chip is configured
for big endian mode. If 53c710 chip is configured for little
endian mode, it osiop cannot be used on big endian machines.
(i.e. ISA/MCA 53c710 would not work on BE machines with current osiop)
Current osiopreg.h handles BE/LE mode like this:
/* byte lane definitions */
#if BYTE_ORDER == LITTLE_ENDIAN
#define BL0 0
#define BL1 1
#define BL2 2
#define BL3 3
#define BL0 3
#define BL1 2
#define BL2 1
#define BL3 0
#define OSIOP_SCNTL0 (0x00+BL0) /* rw: SCSI control reg 0 */
#define OSIOP_SCNTL1 (0x00+BL1) /* rw: SCSI control reg 1 */
#define OSIOP_SDID (0x00+BL2) /* rw: SCSI destination ID */
#define OSIOP_SIEN (0x00+BL3) /* rw: SCSI interrupt enable */
It assumes that "endian mode" of the chip is the same
with its host, but maybe we should check the endian mode
at runtime instead of static #ifdef.
Furthermore, we also have to consider byteswapping of
data structures for script. (address of S/G data etc. for DMA)
One solution is the way used in the MI Sonic (dev/ic/dp83932.c).
It uses sc_regmap array for I/O access and
sonic32toh()/htosonic32() macro for DMA structures.
(but I'm not sure how much overhead for them...)