Subject: Re: Hardware IPv4/TCP/UDP checksumming support
To: =?iso-8859-1?Q?P=E5l_Halvorsen?= <>
From: Michael Lyle <>
List: tech-kern
Date: 09/07/2001 07:43:17
Just for reference, all of the chips I know of understand IP/UDP/TCP
headers sufficiently to compute the checksum.  They transfer the packet
and their computed checksum in 1 or 2 DMA's.  All the driver has to do is
turn the feature on in the card and then retrieve/compare the checksum.

The card can't checksum under all circumstances, when packets are
encapsulated in a form it doesn't understand.  The cards generally
have very nieve layer 3 / layer 4 implementations as they can't spend
much time processing per packet.


On Fri, Sep 07, 2001 at 01:24:34PM +0200, Pål Halvorsen wrote:
> On Fri, 7 Sep 2001, Ignatios Souvatzis wrote:
> > On Fri, Sep 07, 2001 at 09:39:52AM +0200, Pål Halvorsen wrote:
> > > 
> > > If it is transferred to the on-board memory during checksum (which is
> > > delayed until IP processing), does this
> > > mean that the packets in the "if_queue" (IF_ENQUEUE,...) is located on
> > > the onboard memory and from there trasferred to the transmitt ring??
> > 
> > Maybe you want to read the chip docs in addition to the driver docs? I don't 
> > know.
> > 
> > 	-is
> Does anyone know where to download the docs?
> does not exist any more and Alteon is now owned by Nortel Networks....
> Does anyone have a copy of the documentation available, both for the
> Tigon-chip and the ti driver? (used for 3Com 3c985-SX)
> Thanks,
> -ph

Michael P. Lyle
Chief Technical Officer
Recourse Technologies, Inc.