Subject: Re: ARM port organisation (was: Re: NetBSD/hpcarm snap code)
To: None <email@example.com>
From: Richard Earnshaw <firstname.lastname@example.org>
Date: 02/17/2001 18:47:39
> On Sat, Feb 17, 2001 at 01:46:31PM +0000, Richard Earnshaw wrote:
> > (fast context switch) extension in the MMU. If you are prepared to
> > restrict (all?) processes to 32M of VM, then you can avoid cache flushes
> > on a context switch; this also warrants a separate configuration.
> Oh, yah, the WinCE hack -- I don't think we want to use that feature
> on the FCS-capable chips.
On handhelds (like the Ipaq), this may be exactly what is wanted. On a
desktop machine I agree, it's unlikely to be of use because of the
restrictions it imposes.