Subject: PCI configuration problem
To: None <tech-kern@netbsd.org>
From: Martin Husemann <martin@duskware.de>
List: tech-kern
Date: 01/10/2001 07:13:47
--ELM979107227-819-1_
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I'm not sure this is a driver issue or a general bug:
I've added a PCI ISDN card to my sparc64 system (U5). I don't know if I have
to tell OF about this (and if so, how), so I just rebooted.
I don't have docs about the card, so I don't realy know what the various
BARs are, but the driver worked on i386.
Part of the dump (full dump below):
vendor 0x108e product 0x5000 (PCI bridge, revision 0x11) at ? dev 1 function 0 (tag 0x800, intrtag 0x800, intrswiz 0, intrpin 0, i/o on, mem on, no quirks): vendor 0x108e product 0x5000 (rev. 0x11)
pci1 at simba0 bus 2
pci1: i/o space, memory space enabled
isic0 at pci1 dev 1 function 0: PCI configuration registers:
Common header:
0x00: 0x0a001244 0x02800002 0x02800002 0x00000000
Vendor ID: 0x1244
Device ID: 0x0a00
Command register: 0x0002
I/O space accesses: off
Memory space accesses: on
[...]
Base address register at 0x14
type: 32-bit i/o
base: 0x00000400, size: 0x00000020
Now I'm trying to map BAR 0x14 in io space, but: I/O space accesses: off.
So the pci_attach_arg I get has pa->pa_flags without the io enabled bit and
pci_mapreg_map fails accordingly. (The other errors included in the dump
are because of my idiotic try to map this io space BAR in mem space).
So, is this a failure of the firmware? An error in the pci bridge code?
Did I miss something?
Martin
--ELM979107227-819-1_
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pci0 at psycho0
pci0: i/o space, memory space enabled
vendor 0x108e product 0x2000 (miscellaneous prehistoric) at pci0 dev 0 function 0: PCI configuration registers:
Common header:
0x00: 0x2000108e 0x00000146 0x00000000 0x00000000
Vendor ID: 0x108e
Device ID: 0x2000
Command register: 0x0146
I/O space accesses: off
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: on
Address/data stepping: off
System error (SERR): on
Fast back-to-back transactions: off
Status register: 0x0000
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: off
Data parity error detected: off
DEVSEL timing: fast (0x0)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: prehistoric (0x00)
Subclass Name: miscellaneous (0x00)
Interface: 0x00
Revision ID: 0x00
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x00000000 0x00000000 0x00000000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0x00000000
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
vendor 0x108e product 0x2000 (miscellaneous prehistoric) at pci0 dev 0 function 0 (tag 0, intrtag 0, intrswiz 0, intrpin 0, i/o off, mem on, no quirks) not configured
simba0 at pci0 dev 1 function 0: PCI configuration registers:
Common header:
0x00: 0x5000108e 0x02a00147 0x06040011 0x00812810
Vendor ID: 0x108e
Device ID: 0x5000
Command register: 0x0147
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: on
Address/data stepping: off
System error (SERR): on
Fast back-to-back transactions: off
Status register: 0x02a0
Capability List support: off
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: PCI (0x04)
Interface: 0x00
Revision ID: 0x11
BIST: 0x00
Header Type: 0x01+multifunction (0x81)
Latency Timer: 0x28
Cache Line Size: 0x10
Type 1 (PCI-PCI bridge) header:
0x10: 0x00000000 0x00000000 0x28ff0200 0x02800000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x00000000 0x00000000 0x00020000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Primary bus number: 0x00
Secondary bus number: 0x02
Subordinate bus number: 0xff
Secondary bus latency timer: 0x28
Secondary status register: 0x0280
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Signaled Target Abort: off
Received Target Abort: off
Received Master Abort: off
System Error: off
Parity Error: off
I/O region:
base register: 0x00
limit register: 0x00
base upper 16 bits register: 0x0000
limit upper 16 bits register: 0x0000
Memory region:
base register: 0x0000
limit register: 0x0000
Prefetchable memory region:
base register: 0x0000
limit register: 0x0000
base upper 32 bits register: 0x00000000
limit upper 32 bits register: 0x00000000
Reserved @ 0x34: 0x00000000
Expansion ROM Base Address: 0x00000000
Interrupt line: 0x00
Interrupt pin: 0x00 (none)
Bridge control register: 0x0002
Parity error response: off
Secondary SERR forwarding: on
ISA enable: off
VGA enable: off
Master abort reporting: off
Secondary bus reset: off
Fast back-to-back capable: off
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x73bd3acb 0x00000000 0xffffffff 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x3f3f0000
0xe0: 0x0000010f 0x00000001 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
vendor 0x108e product 0x5000 (PCI bridge, revision 0x11) at ? dev 1 function 0 (tag 0x800, intrtag 0x800, intrswiz 0, intrpin 0, i/o on, mem on, no quirks): vendor 0x108e product 0x5000 (rev. 0x11)
pci1 at simba0 bus 2
pci1: i/o space, memory space enabled
isic0 at pci1 dev 1 function 0: PCI configuration registers:
Common header:
0x00: 0x0a001244 0x02800002 0x02800002 0x00000000
Vendor ID: 0x1244
Device ID: 0x0a00
Command register: 0x0002
I/O space accesses: off
Memory space accesses: on
Bus mastering: off
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0280
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: network (0x02)
Subclass Name: miscellaneous (0x80)
Interface: 0x00
Revision ID: 0x02
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00002000 0x00000401 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x0a001244
0x30: 0x00000000 0x00000000 0x00000000 0x00000110
Base address register at 0x10
type: 32-bit nonprefetchable memory
base: 0x00002000, size: 0x00000020
Base address register at 0x14
type: 32-bit i/o
base: 0x00000400, size: 0x00000020
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1244
Subsystem ID: 0x0a00
Expansion ROM Base Address: 0x00000000
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x00
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x10
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
vendor 0x1244 product 0x0a00 (miscellaneous network, revision 0x02) at ? dev 1 function 0 (tag 0x20800, intrtag 0x800, intrswiz 0x1, intrpin 0x2, i/o off, mem on, no quirks): Fritz!Card
pci_mem_find: expected type mem, found i/o
isic0: can't map card
simba1 at pci0 dev 1 function 1: PCI configuration registers:
Common header:
0x00: 0x5000108e 0x02a00147 0x06040011 0x00812810
Vendor ID: 0x108e
Device ID: 0x5000
Command register: 0x0147
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: on
Address/data stepping: off
System error (SERR): on
Fast back-to-back transactions: off
Status register: 0x02a0
Capability List support: off
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: PCI (0x04)
Interface: 0x00
Revision ID: 0x11
BIST: 0x00
Header Type: 0x01+multifunction (0x81)
Latency Timer: 0x28
Cache Line Size: 0x10
Type 1 (PCI-PCI bridge) header:
0x10: 0x00000000 0x00000000 0x28010100 0x02800000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0x00000000 0x00000000 0x00000000 0x00020000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Primary bus number: 0x00
Secondary bus number: 0x01
Subordinate bus number: 0x01
Secondary bus latency timer: 0x28
Secondary status register: 0x0280
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Signaled Target Abort: off
Received Target Abort: off
Received Master Abort: off
System Error: off
Parity Error: off
I/O region:
base register: 0x00
limit register: 0x00
base upper 16 bits register: 0x0000
limit upper 16 bits register: 0x0000
Memory region:
base register: 0x0000
limit register: 0x0000
Prefetchable memory region:
base register: 0x0000
limit register: 0x0000
base upper 32 bits register: 0x00000000
limit upper 32 bits register: 0x00000000
Reserved @ 0x34: 0x00000000
Expansion ROM Base Address: 0x00000000
Interrupt line: 0x00
Interrupt pin: 0x00 (none)
Bridge control register: 0x0002
Parity error response: off
Secondary SERR forwarding: on
ISA enable: off
VGA enable: off
Master abort reporting: off
Secondary bus reset: off
Fast back-to-back capable: off
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x90e27a63 0x00000000 0xffffffff 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x80c00000
0xe0: 0x0000010f 0x00000001 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
vendor 0x108e product 0x5000 (PCI bridge, revision 0x11) at ? dev 1 function 1 (tag 0x900, intrtag 0x900, intrswiz 0, intrpin 0, i/o on, mem on, no quirks): vendor 0x108e product 0x5000 (rev. 0x11)
pci2 at simba1 bus 1
pci2: i/o space, memory space enabled
ebus0 at pci2 dev 1 function 0: PCI configuration registers:
Common header:
0x00: 0x1000108e 0x02800146 0x06800001 0x00800000
Vendor ID: 0x108e
Device ID: 0x1000
Command register: 0x0146
I/O space accesses: off
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: on
Address/data stepping: off
System error (SERR): on
Fast back-to-back transactions: off
Status register: 0x0280
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: miscellaneous (0x80)
Interface: 0x00
Revision ID: 0x01
BIST: 0x00
Header Type: 0x00+multifunction (0x80)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0xf0000000 0xf1000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0xe0000000 0x00000000 0x00000000 0x190a0000
Base address register at 0x10
type: 32-bit nonprefetchable memory
base: 0xf0000000, size: 0x01000000
Base address register at 0x14
type: 32-bit nonprefetchable memory
base: 0xf1000000, size: 0x00800000
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0xe0000000
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x19
Minimum Grant: 0x0a
Interrupt pin: 0x00 (none)
Interrupt line: 0x00
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
vendor 0x108e product 0x1000 (miscellaneous bridge, revision 0x01) at ? dev 1 function 0 (tag 0x10800, intrtag 0x900, intrswiz 0x1, intrpin 0, i/o off, mem on, no quirks)
ebus0: vendor 0x108e product 0x1000, revision 0x01
auxio0 at ebus0 addr 726000-726003 addr 728000-728003 addr 72a000-72a003 addr 72c000-72c003 addr 72f000-72f003
power at ebus0 addr 724000-724003 ipl 37 not configured
SUNW,pll at ebus0 addr 504000-504002 not configured
se at ebus0 addr 400000-40007f ipl 43 not configured
su at ebus0 addr 3083f8-3083ff ipl 41 not configured
su at ebus0 addr 3062f8-3062ff ipl 42 not configured
lpt0 at ebus0 addr 3043bc-3043cb addr 30015c-30015d addr 700000-70000f ipl 34
fdthree at ebus0 addr 3023f0-3023f7 addr 706000-70600f addr 720000-720003 ipl 39 not configured
clock0 at ebus0 addr 0-1fff: mk48t59: hostid 8099fc91
flashprom at ebus0 addr 0-fffff not configured
SUNW,CS4231 at ebus0 addr 200000-2000ff addr 702000-70200f addr 704000-70400f addr 722000-722003 ipl 35 ipl 36 not configured
hme0 at pci2 dev 1 function 1: PCI configuration registers:
Common header:
0x00: 0x1001108e 0x02800006 0x02000001 0x00800000
Vendor ID: 0x108e
Device ID: 0x1001
Command register: 0x0006
I/O space accesses: off
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0280
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: network (0x02)
Subclass Name: ethernet (0x00)
Interface: 0x00
Revision ID: 0x01
BIST: 0x00
Header Type: 0x00+multifunction (0x80)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0xe0000000 0x00000000 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0xe1000000 0x00000000 0x00000000 0x050a0021
Base address register at 0x10
type: 32-bit nonprefetchable memory
base: 0xe0000000, size: 0x00008000
Base address register at 0x14
not implemented(?)
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0xe1000000
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x05
Minimum Grant: 0x0a
Interrupt pin: 0x00 (none)
Interrupt line: 0x21
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
vendor 0x108e product 0x1001 (ethernet network, revision 0x01) at ? dev 1 function 1 (tag 0x10900, intrtag 0x900, intrswiz 0x1, intrpin 0, i/o off, mem on, no quirks): address 08:00:20:99:fc:91
ukphy0 at hme0 phy 1: Generic IEEE 802.3u media interface
ukphy0: OUI 0x080017, model 0x0000, rev. 1
ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
hme0: using vector 33 for interrupt
vendor 0x1002 product 0x4754 (VGA display, revision 0x9a) at pci2 dev 2 function 0: PCI configuration registers:
Common header:
0x00: 0x47541002 0x02800086 0x0300009a 0x00000000
Vendor ID: 0x1002
Device ID: 0x4754
Command register: 0x0086
I/O space accesses: off
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: on
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0280
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: display (0x03)
Subclass Name: VGA (0x00)
Interface: 0x00
Revision ID: 0x9a
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0xe1000000 0x00000001 0x00000000 0x00000000
0x20: 0x00000000 0x00000000 0x00000000 0x00000000
0x30: 0xe1020000 0x00000000 0x00000000 0x0008010f
Base address register at 0x10
type: 32-bit nonprefetchable memory
base: 0xe1000000, size: 0x01000000
Base address register at 0x14
type: 32-bit i/o
base: 0x00000000, size: 0x00000100
Base address register at 0x18
not implemented(?)
Base address register at 0x1c
not implemented(?)
Base address register at 0x20
not implemented(?)
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x0000
Subsystem ID: 0x0000
Expansion ROM Base Address: 0xe1020000
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x00
Minimum Grant: 0x08
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x0f
Device-dependent header:
0x40: 0x0000000c 0x00000000 0x00000000 0x00000000
0x50: 0x00000000 0x00000000 0x00000000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
vendor 0x1002 product 0x4754 (VGA display, revision 0x9a) at pci2 dev 2 function 0 (tag 0x11000, intrtag 0x900, intrswiz 0x2, intrpin 0x3, i/o off, mem on, no quirks) not configured
pciide0 at pci2 dev 3 function 0: PCI configuration registers:
Common header:
0x00: 0x06461095 0x02800005 0x01018f03 0x00000000
Vendor ID: 0x1095
Device ID: 0x0646
Command register: 0x0005
I/O space accesses: on
Memory space accesses: off
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): off
Fast back-to-back transactions: off
Status register: 0x0280
Capability List support: off
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: mass storage (0x01)
Subclass Name: IDE (0x01)
Interface: 0x8f
Revision ID: 0x03
BIST: 0x00
Header Type: 0x00 (0x00)
Latency Timer: 0x00
Cache Line Size: 0x00
Type 0 ("normal" device) header:
0x10: 0x00c00001 0x00c00009 0x00c00011 0x00c00019
0x20: 0x00c00021 0x00000000 0x00000000 0x06461095
0x30: 0x00000000 0x00000000 0x00000000 0x04020120
Base address register at 0x10
type: 32-bit i/o
base: 0x00c00000, size: 0x00000008
Base address register at 0x14
type: 32-bit i/o
base: 0x00c00008, size: 0x00000004
Base address register at 0x18
type: 32-bit i/o
base: 0x00c00010, size: 0x00000008
Base address register at 0x1c
type: 32-bit i/o
base: 0x00c00018, size: 0x00000004
Base address register at 0x20
type: 32-bit i/o
base: 0x00c00020, size: 0x00000010
Base address register at 0x24
not implemented(?)
Cardbus CIS Pointer: 0x00000000
Subsystem vendor ID: 0x1095
Subsystem ID: 0x0646
Expansion ROM Base Address: 0x00000000
Reserved @ 0x34: 0x00000000
Reserved @ 0x38: 0x00000000
Maximum Latency: 0x04
Minimum Grant: 0x02
Interrupt pin: 0x01 (pin A)
Interrupt line: 0x20
Device-dependent header:
0x40: 0x00000000 0x00000000 0x00000000 0x00000000
0x50: 0xc000ec44 0xcc00c000 0x00004000 0x00000000
0x60: 0x00000000 0x00000000 0x00000000 0x00000000
0x70: 0xf0003400 0xc001c000 0xf0000008 0xd5fbeddc
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
Don't know how to pretty-print device-dependent header.
vendor 0x1095 product 0x0646 (IDE mass storage, interface 0x8f, revision 0x03) at ? dev 3 function 0 (tag 0x11800, intrtag 0x900, intrswiz 0x3, intrpin 0x4, i/o on, mem off, no quirks): CMD Technology PCI0646 (rev. 0x03)
--ELM979107227-819-1_--