In article <20001113141304.D19591FF85@thoreau.thistledown.com.au> you write:
>Also, there are lots of places where I've made assumptions about what is
>a valid ISA for a given architecture.  These should be checked by people
>familiar with those architectures.  The only ones I'm confident with are
>mips, alpha, m68k, ns32k and perhaps sparc.  Here's a list of the ISA's:
>
>	alpha	ev{4,5,56,6,67}
>	arm26	arm2
>	arm32	arm{2,3,4}

These should be armv2 etc (arm2 usually refers to a specific CPU).  I
suspect that following GCC would be wise, which gcc.info claims gives:

	arm26	armv{2,2a}
	arm32	armv{3,3m,4,4t}

>So, anyone disagree with this whole idea or have any suggestions of
>improvements?

Question:  If the kernel emulates the instructions provided by later ISAs,
what should it report?

>Index: arch/arm26/arm26/machdep.c
>===================================================================
>RCS file: /cvsroot/syssrc/sys/arch/arm26/arm26/machdep.c,v
>retrieving revision 1.5
>diff -d -p -u -r1.5 machdep.c
>--- arch/arm26/arm26/machdep.c	2000/09/13 15:00:17	1.5
>+++ arch/arm26/arm26/machdep.c	2000/11/13 05:01:54
>@@ -48,6 +48,7 @@ int physmem;
> char machine[] = MACHINE;
> char machine_arch[] = MACHINE_ARCH;
> char cpu_model[] = "Archimedes";
>+char cpu_isa[] = "arm2";	/* XXX */
> 
> /* Our exported CPU info; we can have only one. */
> struct cpu_info cpu_info_store;

This would need to be set to "armv2" or "armv2a" in cpu_attach().

-- 
Ben Harris                                                   <bjh21@netbsd.org>
Portmaster, NetBSD/arm26               <URL:http://www.netbsd.org/Ports/arm26/>