Subject: Re: MI I^2C drivers
To: Castor Fu <firstname.lastname@example.org>
From: Jason R Thorpe <email@example.com>
Date: 07/26/2000 10:47:26
On Wed, Jul 26, 2000 at 10:30:12AM -0700, Castor Fu wrote:
> But the stuff in sys/dev/i2c is just not that useful. We wanted a more
> general framework. On our system we have something like the following:
> cai2c0 at chipa?
> iicbus* at cai2c?
> zot0 at iicbus? slaveaddr 0x34 # normalized slave address
> bar0 at iicbus? slaveaddr 0x46 # normalized slave address
> The iicbus device has an ioctl for servicing raw io requests through
> the interface which is also used by child devices.
> The io requests at the read/write multiple bytes to support devices
> like ours where the I2C interface can spit out multiple bytes at a time.
> Things get even more complicated if you want to support multiple
> masters, but I don't know of any systems which take advantage of
> that part of I2C.
> I've heard rumors that cgd has similar requirements to ours. . .
> If people think this is of general interest we can start iterating on
> a common framework.
Also take into consideration SMBus, please, and the fact that not all
host controllers are bit-bangers.
-- Jason R. Thorpe <firstname.lastname@example.org>