On Tue, 20 Jun 2000, Manuel Bouyer wrote:

> On Tue, Jun 20, 2000 at 02:02:34PM +0530, Vikram wrote:

> > 1) Whart is DMA cacheing?
> 
> Depending on machines there can be memory cache between the main memory
> and CPU. If CPU change a byte, and it stay in cache and is not updated in main
> memory you'll have to flush the cache before starting the DMA op (because the
> device read from the main memory it would read incorrect data otherwise).
> The same problem can happen the other way: the device writes data in main
> memory but the cpu keep reading the cached data, to get the real value you
> need to invalidate the cache before.

In addition certain devices or machines may have a cache in the path
between a DMA engine and memory or a device and it's DMA engine.  In those
situations the DMA pipeline would need to be flushed to insure data
integrity.

Eduardo Horvath