Subject: RE: bus_dma and cache line sizes
To: Castor Fu <>
From: Martin Husemann <>
List: tech-kern
Date: 03/25/2000 07:25:45
> The two obvious solutions are to access the descriptors
> as uncached memory, or I need to know the cache line size to
> pad the descriptors to 32 bytes.  Any suggestions
> on what "The Right Thing" is?

Whatever TRT is, it should be done inside the bus_dma implementation for
that architecture. I don't see a way to implement the second solution there,
so IMHO the first one wins.