Subject: Adaptec2940 and PCI DMA (NetBSD/Atari)
To: None <tech-kern@netbsd.org>
From: Leo Weppelman <leo@wau.mis.ah.nl>
List: tech-kern
Date: 03/03/2000 22:29:03
I am having big troubles in getting the 2940 to work on the Hades PCI-bus.
In the meantime I found out that getting info on this subject is not easy
either. So as a last resort, I decided to try this list.

The problem seems to be somewhere in the DMA process. When I started with
my current motherboard/card combination, nothing worked. When I changed the
line:
   AHC_OUTB(ahc, DSPCISTATUS, DFTHRSH_100);
into:
   AHC_OUTB(ahc, DSPCISTATUS, 0);

Things started to work a bit. Although I have no idea what I am doing there :-(

When I tell the adaptec to do an inquiry command and supply an 16-byte
aligned DMA destination address (0x8....1e0 in this example), what I get is:

0x8....1d0: ff ff ff ff ff ff ff ff ff ff ff ff 00 00 02 02
0x8....1e0: 8f 00 00 12 53 45 41 47 41 54 45 20 53 54 33 31
0x8....1f0: 32 30 30 4e 20 20 20 20 20 20 20 20 ff ff ff ff
0x8....200: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
0x8....210: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

As can be seen, the start of the transfer is actually 4 bytes _below_ the
requested location. The data returned is correct however.
[ Notes: The buffer was filled with 0xff beforehand, the disk responding
  was a SEAGATE ST31200N ]

When the buffer is not 16-byte aligned, all sorts of weird u_int32 shufflings
take place. From the vendor of my motherboard, I got the info that _if_ I
want to do burst DMA, I have to specify a Cache-line-size of 16 bytes and
align on a 16-byte boundary. When I change the PCI-register PCI_BHLC_REG
to reflect this and align the DMA-buffers correctly, nothing changes.

Is there anyone on this list who can help me with this?

Leo.