Hi,

I've just got a look again at the cypress pciide docs, and discovered
a few things I missed the first time. Basically, the cypress has 2
pciide functions, one for each channel. This means that for now
I have one pciide driver instance attached for each channel (each of
them has only one channel, of course):
pciide0 at pci0 dev 8 function 1: Contaq Microsystems CY82C693 IDE 
Controller 
pciide0: bus-master DMA support present 
pciide0: primary channel wired to compatibility mode 
[...]
pciide1 at pci0 dev 8 function 2: Contaq Microsystems CY82C693 IDE 
Controller 
pciide1: hardware does not support DMA 
pciide1: primary channel wired to compatibility mode 

Now I discovered 2 things:
- DMA mode are setup using ISA registers at I/O 0x22 and 0x23 (used for
  both channels, one is index port, the second data port).
- In fact pciide1 *does* support DMA, but as the bus-master DMA register I/O
  space has been already allocated for the primary channel (pciide0) it's not
  allocated for the second.

So I need 2 things:
1) bus_space_map() I/O 0x22 and 0x23 in ISA space. Of course I don't
   get a bus_space_tag for this. For now I use the one I got for the
   bus-master DMA registers (which is also in ISA space), I hope this will DTRT.
   Is there a better way to do this ?
2) I need to pass infos between the drivers for function 1 and function 2
   (pciide0  and pciide1) of the chip (the bus_space_tag/handles for the DMA
   setup and bus-master DMA registers). If I could get the softc of function 1
   from the function 2 driver this would be very nice.
   I could use a static variables to pass the softc, as I can't see why
   function 2 wouldn't be attached immediatly after function 1, buit this
   looks a bit gross.

Any advice, please ?

--
Manuel Bouyer, LIP6, Universite Paris VI.           Manuel.Bouyer@lip6.fr
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