Subject: Re: A TODO list for cardbus/ PCMCIA support.
To: Chris G. Demetriou <email@example.com>
From: Jonathan Stone <jonathan@DSG.Stanford.EDU>
Date: 06/16/1999 18:53:27
>This is a specific case of a more general problem:
>Support for PCI chips which aren't initialized properly by BIOSes.
Not entirely. Even when a PCI-to-cardbus,pcmcia is initialized
properly by the BIOS, we still have no way, currently, to restrict
child devices (cardbus cards) to whatever window of PCI space the
bridge-chip acutally groks. (e.g., limited size, or alignment
restrictions on the window the bridge can handle).
>It's not clear that 'alloc' is the right mechanism to use anyway.
Sure. Where and how to do this is where Jason and I seemed to
disagree. Basic point, though, is that _something_, somewhere, needs
to keep track of the base-addresses and lengths; without that, we
cannot do what you call the `bin-packing'.
But I'm not sure we're talking about the same problem. As best I
understand Hayakawa-san, the problem whichthe current CardBus patches
address is that bridges only support a subset (window) of the
parent-bus (e.g., PCI) on their child-bus side (e.g., CardBus); and
the devices on the child-bus have to be bin-packed into that window.
Thats different from itrying to pack all the child-devices'
requirements togehter and then allocating the bridge enough space to
hold the total requirements -- which is how I read your message.
Perhaps best is to figure out what the base is going to be, given info
on the bridge; pack the children of the far-side of the bridge at
addresses commensurate with what the bridge can handle (e.g., due to
the bridge ignoring some address bits), and finally relax the size
of all the childre to get the final size allocated for the brige.
(is that comprehensible?)
>I'm not working on this, but i can provide input to people who want to.
OK. Chris, can you get in touch with Hayakawa-san?