"Eduardo E. Horvath" writes:
> On Thu, 29 Apr 1999, Chuck Silvers wrote:
> 
> > the idea is that you leave as much of the cached data mapped in the kernel
> > as you can, and the obvious way to do that is with pageable (ie. "non-wired")
> > pmap entries.  then the mappings to cached file data compete with everything
> > else for pmegs on the sun4c and sun3.  I don't know how other ports will
> > want to deal with this.  pagetable-based MMUs probably don't care so much...
> > the only difference there is that you could reclaim the PTPs for these
> > mappings, which may not be worth it, depending on how much virtual space
> > you use for the mapping cache.
> 
> Oh, good.  I thought you meant paging out the page tables (which would
> probably cause some problems).  Are you using pmap_enter() or
> pmap_kenter()?  I think the former should work for what you want (just
> don't set the `wired' bit) but the latter probably won't.

I'm using pmap_enter() so far, since my initial developement platform
didn't have PMAP_NEW.  the whole pmap_enter()/pmap_kenter() thing
is still somewhat up in the air, I think.

-Chuck