Subject: PCI I/O address allocation
To: None <tech-kern@netbsd.org>
From: Lennart Augustsson <augustss@cs.chalmers.se>
List: tech-kern
Date: 11/24/1998 21:33:48
I've bought a Turtle Beach Daytona sound card.  It uses the S3 SonicVibes
chip.  This chip is a really odd design, it requires six (6) I/O
regions.  As I understand it the PCI spec supports 4 and that is what 
BIOS allocates.  That leaves 2 regions that the driver has to
allocate.  Here's my proposed solution; I want comments:

In the attach code I don't allocate any I/O regions since we can't
really tell what's free until all drivers have had a chance to attach,
instead I call config_defer() to delay the allocation.

When the deferred function is run it allocates the space with the following
utility function:

#define PCI_IO_ALLOC_LOW 0xa000
#define PCI_IO_ALLOC_HIGH 0x10000
int
pci_alloc_io(pc, pt, pcioffs, iot, size, align, bound, flags, ioh)
                 pci_chipset_tag_t pc;
                 pcitag_t pt;
                 int pcioffs;
                 bus_space_tag_t iot;
                 bus_size_t size;
                 bus_size_t align;
                 bus_size_t bound;
                 int flags;
                 bus_space_handle_t *ioh;
{
        bus_addr_t addr;
        int error;

        error = bus_space_alloc(iot, PCI_IO_ALLOC_LOW, PCI_IO_ALLOC_HIGH,
                                size, align, bound, flags, &addr, ioh);
        if (error)
                return(error);

        pci_conf_write(pc, pt, pcioffs, addr);
        return (0);
}

Should I add this function to the pci utilties?
What's a reasonable interval to allocate the ports in?

       -- Lennart