At 02:46 AM 2/3/98 , Jonathan Stone wrote:
>>On Sun, 1 Feb 1998 05:06:45 -0800 (PST) 
>> Ross Harvey <ross@teraflop.com> wrote:
>.
>> > I do want to state for the record that I think bus_dma(9) is a work
>> > of exceptional merit, and that I will continue to hold that opinion
>> > even if BUS_DMAMEM_NOSYNC is allowed to live.
>>
>>Heh, thanks :-)  Given some comments from Jonathan Stone, I think I
>>may indeed allow it to live, but in a slightly different way; see below.
>
>
>Looks great to me, but then it's prety much exaclty what I suggested.
>I like the namechange and you got the motivation about cache-coherence
>of DMA pretty much right.  I'd buy this and I hope Matt Thomas will,
>too.

Looks fine to me.

>Mmm, if it's relevant, don't forget to acknowledge the people who
>yelled and screamed, er, offered constructive criticism to the
>bus-space and bus-dma work, specially all the changes since the NetBSD
>1.2 version of bus spaces... (those separate io and mem spaces?)

If you don't, I be a pain in New Orleans. :-)

>>            Synchronization operations are expressed from the perspective
>>            of the host RAM, e.g. a device -> memory operation is a READ,
>>            and a memory -> device operation is a WRITE.
>
>
>The only quibble I have is that i find this completely
>counterintuitive. The Hardware designers I debug hardware for
>consistently use "DMA read" to mean a read request from the device to
>memory -- an output operation -- and "DMA write" to mean an input
>operation.  Mixing "DMA" and READ|WRITE together seems like an RSVPed
>invitation to confusion.

I agree.   Or change READ and WRITE to IN and OUT (though I like READ
and WRITE).

>Hmmmmmm.... oops. Jason, is there an implicit bus-space barrier
>operation (or moral equivalent) in doing a DMA-synch operations on a
>BUS_DMA_COHERENT dma map? I think there really needs to be, to get the
>desired effect. (I'm thinking writebuffer drain here, rather than DMA
>consistency per se).

This is my one outstanding issue.  sync is the only way to do bus-space
barriers.

>Otherwise, driver writers would have to put one in, there might not be
>a bus-space tag handy, it's ugly, and it's suboptimal in the case
>where a DMA_COHERENT mapping wasn't available.

Not just handy, there's bus-space tag available at all (since this is
host memory).
-- 
Matt Thomas               Internet:   matt@3am-software.com
3am Software Foundry      WWW URL:    http://www.3am-software.com/bio/matt/
Nashua, NH                Disclaimer: I disavow all knowledge of this message