Subject: Re: serial port silo overflow repair
To: Jukka Marin <firstname.lastname@example.org>
From: Eduardo E. Horvath <email@example.com>
Date: 07/29/1997 09:59:51
On Tue, 29 Jul 1997, Jukka Marin wrote:
> The system clock (returned by time(3)) is drifting slowly? What kind
> of timers does the Sparc hardware have? Do they generate evenly spaced
> interrupts in their own or does the software have to reinitialize the
> timer after every interrupt? In the latter case, I don't think you can
> make the clock 100% stable on a system using more than just one interrupt
> (or even if different instructions affect the interrupt latency). On the
> other hand, if the hardware times generates a 100 Hz interrupt, the clock
> shouldn't be drifting at all unless the system misses some interrupts
> completely (or the crystal driving the timer hasn't been calibrated).
SPARC timers can be set to auto-reset at a certain value. I don't
know if the sparc port uses them this way. However, they only have a 1us
resolution and may not be very well tuned.
Eduardo Horvath firstname.lastname@example.org
"Cliffs are for climbing. That's why God invented grappling hooks."
- Benton Frasier