> >I'll be glad to help out with an effort aimed at a common driver.
> >However, the obvious first question is:  Does the strange wiring
> >used by that hardware make it unreasonably hard to share the code?
> >It is hard to answer that without sketching out a design to see
> >what the impact is on the other applications of the driver.
> 
> Okay, here's a possible design:
> 
> Put in the zs_chanstate structure the following member:
> 
> 	struct zs_chanstate *cs_ctl_chan;
> 
> 
> Normal MD code will initialize this member to the value of the same
> channel that they resize in - i.e.
> 
> 	cs->cs_ctl_chan = cs;
> 
> But on the Alpha (and maybe the pmax, eventualy), the zs driver will do:
> 
> 	if (channel = 1)
> 		cs->cs_ctl_chan = &zsc_cs[0];
> 
> And MI code will do:
> 
> 	cs->cs_ctl_chan->cs_preg[5] |= cs->cs_wr5_dtr;
> 
> 	zs_write_reg(sc->cs_ctl_chan, 5, sc->cs_ctl_chan->cs_preg[5]);

I too had come up with a similar idea. I think it'll work, and not
bother the other users of the driver.

One other change is that the load channel code needs to load both the
main channel's WR5, and the subsidiary channel's WR5.

Take care,

Bill