On Fri, 25 Apr 1997, Gordon W. Ross wrote:

> Would it be possible to send the SCSI command to the esp AFTER it
> completes target selection?  If we could do that, we would never
> have the possibility of reselect getting in between after we have
> loaded the SCSI command into the FIFO and before target selection
> is complete.  Would this solve the problem?

The problem lies in the fact that reselection itself is an act initiated
by the remote target and can occur at any time.  It is essentially an
interrupt, occurring asynchronously to anything the CPU is currently
doing.

The bug lies in the fact that the hardware is broken.  During the time you
are loading a command into the FIFO, a reselection can take place.  When
this happens the esp clears the contents of the FIFO and posts an
interrupt.

There is a lag time between the period when the FIFO is cleared and when
the hardware manages to assert the IRQ pin.  During this time the CPU is
still oblivious to the fact that the FIFO has been cleared and is starting
to be filled with data from the reselecting target.  The CPU continues to
fill in the remaining bytes of its command, inadvertantly interspersing
them with the incomming bytes from the target.  Eventually the IRQ pin is
asserted and the reselect interrupt is processed.  When the interrupt
handler examines the FIFO it sees a mishmashed collection of incoming and
outgoing data.

Symbios recognized this bug in their first version and fixed it in the
later ones.  The solution was to lock the FIFO, preventing the CPU from
filling it during the reselection.  It's just unfortunatatly missing from
the early model.

-J