Subject: Re: The esp bug
To: None <tech-kern@NetBSD.ORG, gwr@mc.com>
From: Matthew Jacob <mjacob@feral.com>
List: tech-kern
Date: 04/25/1997 13:14:55
To do this, if I recall, you need to do a SEL_AND_STOP command, which
leaves the ESP chip connected and ATN asserted (this all from memory).

I've really kept out of this discussion (due to overload, etc..) all along,
but in handling the collisions between selection attempts and a reselection
coming in, I recall it being really not that much of a problem- much easier
than the NCR5380.

First, to narrow the window, you check for interrupts just prior to
sending the SEL command... But that won't catch all the cases (just
makes it cleaner).

Second, when you get an interrupt and offload the step, stat and intr
and fifo count registers, weed out the the GROSS ERROR, RESET and ILLEGAL
cases.

Third, check for the interrupt being one of DISCONNECT (no response to
selection), BUS SERVICE or'd with FUNCTION COMPLETE (indeterminate breakage),
and finally RESELECT or'd with FUNCTION COMPLETE (if the interrupt is something
else, you can check the step register value you saved for seeing how far
in the selection process you got).

If a reselect has happened, your selection attempt was glotzed, and you can
switch over to preemption code that handles a reselection. The ESP chip
guarantees that it will latch up the FIFO count register for the things you
wrote into it (for the selection attempt), and that when you read the FIFO
count register that will unmask the *real* stuff in the FIFO which is the
reselecting target's ID and an IDENTIFY message (which you should check
by reading the fifo count register a second time as you attempt to
handle the reselection and make sure it really is a value of 2).

Hope this helps.. Hit delete or flame away if not....

-matt