Subject: Re: DMA beyond end of isa
To: None <Chris_G_Demetriou@niagara.nectar.cs.cmu.edu>
From: Andrew Cagney <email@example.com>
Date: 01/06/1996 13:01:01
Excerpts from mail: 5-Jan-96 Re: DMA beyond end of isa
> "and now to rant!"
> I really hope they don't go the 'normal' PC route with the 82378,
> where PCI interrupts are mapped through IRQs which are handled by the
> PICs on the 82378. That would be nasty.
IBM did that in their PR*P sandlefoot machine. Fortunatly in CHRP, they
got that bit right - CHRP mandates an OpenPIC interrupt controller and
an open-boot device tree that specifies exactly how the interrupts are
wired up. PCI devices must be wired to the OpenPIC controller and are
strongly encouraged to allocate one OpenPIC interrupt to each device
(you've got up to 2048 interrupts to play with).
If an ISA bus is present it must have an 8259. The hw can then be
configured to either a. run every thing through the 8259 (OpenPIC
forwards its interrupts to int15) or conversly b. have the ISA
interrupts forwarded to the OpenPIC. The worst of both worlds? (NB:
I've left out a few details, the CHRP and OpenPIC specs would appear to
have a minor conflict ...).