Subject: Re: ISA bounce buffer/DMA interface
To: Juergen Hannken-Illjes <firstname.lastname@example.org>
From: Chris G Demetriou <Chris_G_Demetriou@BALVENIE.PDL.CS.CMU.EDU>
Date: 09/15/1995 02:57:47
> I'm about to implement the ISA bounce buffer & DMA interface ironed out by
> Chris Demetriou on the i386 port. I have modified his last interface
> specification (dated Sun, 04 Jun 1995) a little bit.
> Main change is the introduction of a 'sizes' array to hold the size
> for each 'mappings' entry. The result will be an array of (phys addr, size)
> pairs. This is a more general representation for scattered DMA segments.
(1) the ISA/EISA/PCI interfaces in my code look like nothing that i've
previously distributed on mailing lists; get my latest alpha code
to see what they look like now (where "latest" may be later than
what's currently up for FTP, but i hope to put the latest sources
and binaries up within the week).
(2) as the interface was specified, the sizes of the elements were
implicitly defined. the DMA map function, and friends, mapped
from VA -> ISA bus PA, with the assumptions that:
(1) the virtual addresses were contiguous, and that,
(2) there is some correspondence between system physical
pages (or virtual pages) and ISA bus 'pages.'
in other words:
(1) the interface was _NOT_ meant to do sub-page-size
scatter-gather DMA; as far as i can tell, that's not
possible on any ISA implementation i've seen. (though
the Alpha, for instance, _does_ allow one to do
scatter-gather DMA with 8k (system page size) granularity.
If a given piece of hardware can do scatter-gather
DMA, then one should call the map/copy/unmap functions
multiple times (at the appropriate times!), once each
for each 'piece' of the scatter-gather DMA.
(2) system pages will not be 'intertwined' on the ISA bus.