Hello,

On RISC processors, there is significant overhead in saving floating
point registers during a context switch.  To avoid this a kernel will
often start a process with the FPU disabled and then wait for a
FPU-disabled exception before enabling it.  In the case of NetBSD, the
```printf()''' function contains floating point code which (for one
architecture at least) results in the compiler generating instructions
to save floating point registers on function entry (and thus gain the FP
state) even if the fp code proper is actually never reached.

Has any one looked into this? (If it makes sense :-)

		Andrew