Subject: Re: Naming of peripheral bus on SoC's
To: Toru Nishimura <locore64@alkyltechnology.com>
From: Simon Burge <simonb@NetBSD.org>
List: tech-embed
Date: 07/03/2007 23:04:27
"Toru Nishimura" wrote:

> At the same time, I deeply express skeptical to PPC405 NetBSD
> implementation of bus construct, which apparently intends to mimic/expose
> HW defined internal.  On-chip interconnect topology is quite likely
> changed in the _next_ product release.  Then adapting old code to new
> SoC would get bitter and bitter.  I would even stand sliently with a placard
> saying, "SoC is incompatible in any ways, can not be ruled in a single
> discipline."

I'm curious to see what you think is wrong about the current PPC405
implementation.  As far as I know, the current plb/opb interconnects
used are the same in both the 405 and 440 product lines.  Do you have
any suggestions on how you'd think it could be done better?

Cheers,
Simon.