Subject: Re: NAND flash support
To: Toru Nishimura <>
From: Matt Thomas <>
List: tech-embed
Date: 03/09/2007 09:17:32
On Mar 9, 2007, at 12:45 AM, Toru Nishimura wrote:

> David Young wrote;
>> Once there are drivers for two or more NAND chips in NetBSD, we can
>> extract the functions that the drivers have in common and produce a
>> NAND framework.
> Let's go in a smart way.  I realized L* MTD is not a good example  
> after all
> when I started NAND block device code.
> There are number of ways to control NAND chip;
> 1. bare GPIO fiddling,
> 2. ALE / CLE by address control signal,
> 3. dedicated HW supports by SoC.  The simplest is to have extra wires
> to replace GPIOs.  The most sophisticated one can perform DMA xfer
> with automatic ECC generation and verification.  We can see the wide
> variety of NAND circuit support in modern SoC; Toshiba TX49, AMCC
> PPC440, MesDigital MMSP2, Sharp LH and a flock of other ARM7/9 SoC.

And you have NAND via MMC which uses a protocol to read/write/erase
blocks on the NAND.  One could use this protocol as a basis for a new