Subject: Re: NAND flash support
To: Toru Nishimura <>
From: Jared D. McNeill <>
List: tech-embed
Date: 03/09/2007 07:11:15
On Fri, 9 Mar 2007, Toru Nishimura wrote:
> So, I think it'd be beneficial to have a combination of two "ops" set
> for coherent encapsulation;
> A. the way to control chip, this is, issuing CMD, ADDR4/3/2/1 or some.
> B. the way to read/write page, erase block, retrieve prodID or WP status.

FYI, the MI flash layer is based on Windows CE 5.0 FMD[*] and provides 
exactly 'B'.