Subject: CVS commit: src/sys/arch/sh3/sh3
To: None <>
From: Valeriy E. Ushakov <>
List: source-changes
Date: 02/08/2006 00:32:06
Module Name:	src
Committed By:	uwe
Date:		Wed Feb  8 00:32:06 UTC 2006

Modified Files:
	src/sys/arch/sh3/sh3: exception_vector.S

Log Message:
While here, shave off few bytes and few cycles off of the sh3_vector_tlbmiss.

Since the registers we use are at the very end of address space, we
can load their addresses as small immediate negative constants instead
of loading them from memory.

To generate a diff of this commit:
cvs rdiff -r1.16 -r1.17 src/sys/arch/sh3/sh3/exception_vector.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.