On Wednesday 07 January 2004 1:25 pm, Paul Kranenburg wrote:

> You might also consider this:
>
> 	#define __insn_barrier()        __asm __volatile("": : : "g0")
>
> (see sparc/include/cdefs.h), which prevents instruction re-ordering
> but does not include the `memory clobber' that will cause register
> reloads on the other side.

The trouble is that gcc would still technically be permitted to reorder 
'protected' load-memory-to-register instructions outside of the 
'protected' region of code.

I've spoken with Ian Lance Taylor on this subject, and his advice is to 
use the memory clobber regardless.

Cheers, Steve