Subject: CVS commit: src/sys/arch/mips
To: None <source-changes@NetBSD.org>
From: Takao Shinohara <shin@netbsd.org>
List: source-changes
Date: 11/01/2003 04:42:56
Module Name:	src
Committed By:	shin
Date:		Sat Nov  1 04:42:56 UTC 2003

Modified Files:
	src/sys/arch/mips/include: cache_r10k.h
	src/sys/arch/mips/mips: cache.c cache_r10k.c

Log Message:
cache_r10k.c rev. 1.1 is broken. Because,

	1) R10k uses VA0 to select cache ways, but in rev. 1.1, VA14
	   is used instead.
	2) R10k does not support HitWriteBack and should map HitWriteBack
	   to HitWriteBackInvalidate, but in rev. 1.1, HitWriteBack is not
	   handled properly.

So, cache_r10k.c rev. 1.1 was replaced by new implementation.


To generate a diff of this commit:
cvs rdiff -r1.1 -r1.2 src/sys/arch/mips/include/cache_r10k.h
cvs rdiff -r1.22 -r1.23 src/sys/arch/mips/mips/cache.c
cvs rdiff -r1.1 -r1.2 src/sys/arch/mips/mips/cache_r10k.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.