Subject: CVS commit: src/sys/arch/arm/arm32
To: None <>
From: Hiroyuki Bessho <>
List: source-changes
Date: 03/29/2003 09:58:19
Module Name:	src
Committed By:	bsh
Date:		Sat Mar 29 07:58:19 UTC 2003

Modified Files:
	src/sys/arch/arm/arm32: pmap.c

Log Message:
for Intel PXA2[15][05] processors, select write-back/write-through
cache based on CPU id.  write-through on PXA2[15]0 B2 stepping and
earlier. write-back on C0 and C1 stepping (a.k.a PXA2[15]0 A0)

options XSCALE_CACHE_WRITE_{THROUGH,BACK} can override it.

for other XScale CPUs than PXA2xx, XSCALE_CACHE_WRITE_THROUGH works
same as before.

To generate a diff of this commit:
cvs rdiff -r1.128 -r1.129 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.