Subject: CVS commit: src/sys/arch/mips
To: None <>
From: Rafal Boni <>
List: source-changes
Date: 03/08/2003 06:43:26
Module Name:	src
Committed By:	rafal
Date:		Sat Mar  8 04:43:26 UTC 2003

Modified Files:
	src/sys/arch/mips/conf: files.mips
	src/sys/arch/mips/include: cache_r4k.h
	src/sys/arch/mips/mips: cache.c cache_r5k.c
Added Files:
	src/sys/arch/mips/include: cache_r5k.h
	src/sys/arch/mips/mips: cache_r5k_subr.S

Log Message:
Add support for R5k secondary caches, from code Chris Sekiya sent me a long
time ago, with small tweaks by me.  Since the R5k doesn't do VCE, the pmap
still needs to be whacked for R5kSC CPUs to work correctly, but this is a

To generate a diff of this commit:
cvs rdiff -r1.45 -r1.46 src/sys/arch/mips/conf/files.mips
cvs rdiff -r1.9 -r1.10 src/sys/arch/mips/include/cache_r4k.h
cvs rdiff -r0 -r1.1 src/sys/arch/mips/include/cache_r5k.h
cvs rdiff -r1.17 -r1.18 src/sys/arch/mips/mips/cache.c
cvs rdiff -r1.7 -r1.8 src/sys/arch/mips/mips/cache_r5k.c
cvs rdiff -r0 -r1.1 src/sys/arch/mips/mips/cache_r5k_subr.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.