Subject: CVS commit: src/sys/arch
To: None <>
From: Rafal Boni <>
List: source-changes
Date: 01/10/2003 05:22:49
Module Name:	src
Committed By:	rafal
Date:		Fri Jan 10 03:22:49 UTC 2003

Modified Files:
	src/sys/arch/mips/include: cpuregs.h
	src/sys/arch/mips/mips: cache.c
	src/sys/arch/sgimips/sgimips: machdep.c

Log Message:
Add the MIPS3_CONFIG_SE (name taken from Rm52xx manual) bit, which is the
external cache enable bit -- this allows software to enable or disable the
(external) L2 cache on the R5k and Rm527x and the (external) L3 cache on
the Rm7k.  If the (external) cache is disabled, treat it as if there were
no cache for the purposes of the cache setup code.

Also, update sgimips code to use the new name.

To generate a diff of this commit:
cvs rdiff -r1.58 -r1.59 src/sys/arch/mips/include/cpuregs.h
cvs rdiff -r1.15 -r1.16 src/sys/arch/mips/mips/cache.c
cvs rdiff -r1.47 -r1.48 src/sys/arch/sgimips/sgimips/machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.