Subject: CVS commit: syssrc/sys/arch/mips
To: None <source-changes@netbsd.org>
From: Simon Burge <simonb@netbsd.org>
List: source-changes
Date: 12/17/2002 14:04:31
Module Name:	syssrc
Committed By:	simonb
Date:		Tue Dec 17 12:04:31 UTC 2002

Modified Files:
	syssrc/sys/arch/mips/include: cache.h cpu.h
	syssrc/sys/arch/mips/mips: cache.c cache_mipsNN.c

Log Message:
Add support for caches where the data cache is fully coherent, and
either requires flushing either only when the I cache ops are used
or not at all.  Currently only used by MIPS32/MIPS64 cache code.


To generate a diff of this commit:
cvs rdiff -r1.4 -r1.5 syssrc/sys/arch/mips/include/cache.h
cvs rdiff -r1.68 -r1.69 syssrc/sys/arch/mips/include/cpu.h
cvs rdiff -r1.14 -r1.15 syssrc/sys/arch/mips/mips/cache.c
cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/mips/mips/cache_mipsNN.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.