Module Name:	syssrc
Committed By:	rafal
Date:		Thu Oct 10 18:16:41 UTC 2002

Modified Files:
	syssrc/sys/arch/sgimips/sgimips: bus.c

Log Message:
Memory and I/O space accesses to MACE PCI address ranges are passed through
in the correct byte order, so there's no reason to byteswap them.


To generate a diff of this commit:
cvs rdiff -r1.14 -r1.15 syssrc/sys/arch/sgimips/sgimips/bus.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.