Module Name:	syssrc
Committed By:	scw
Date:		Mon Aug 26 11:13:14 UTC 2002

Modified Files:
	syssrc/sys/dev/mii: sqphy.c

Log Message:
Add support for the SMsC LAN83C183 PHY, which actually probes as a
Seeq 84220.

Also add an 84220-specific work-around for some braindamage (at least
in the PHY I'm working with) where the PHY always comes out of reset
isolated, regardless of the previous state of the BMCR_ISO bit. This
happens even if the PHY has address zero, which is contrary to the
part's datasheet...

The work-around is only applied if we notice BMCR_ISO is set when it
should be clear following reset. The fix is to wait 30mS and clear
it manually. (The change doesn't stick if it's cleared sooner than this)


To generate a diff of this commit:
cvs rdiff -r1.27 -r1.28 syssrc/sys/dev/mii/sqphy.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.