Module Name:	syssrc
Committed By:	thorpej
Date:		Tue Aug 20 15:21:29 UTC 2002

Modified Files:
	syssrc/sys/arch/arm/arm32 [nathanw_sa]: cpuswitch.S

Log Message:
Check to see if the incoming LWP has the same L1 table as the
outgoing LWP.  If so, then we can skip the cache purge and TTB
reload.  This results in a ~40% reduction in cache purges called
from cpu_switch() in my test using two threaded applications which
communicate with each other.


To generate a diff of this commit:
cvs rdiff -r1.3.2.19 -r1.3.2.20 syssrc/sys/arch/arm/arm32/cpuswitch.S

Please note that diffs are not public domain; they are subject to the
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