Module Name:	syssrc
Committed By:	thorpej
Date:		Fri Jun 28 18:44:45 UTC 2002

Modified Files:
	syssrc/sys/dev/pci: if_bge.c

Log Message:
When stopping the various functional blocks of the chip, clear the
bit and then read it back in a loop (with appropriate delays) waiting
for it to read back clear.

This fixes a problem where the bus would hang when bringing down
the interface or changing interface flags on a system with a
sufficiently fast CPU (e.g. 2GHz P4 Xeon).


To generate a diff of this commit:
cvs rdiff -r1.10 -r1.11 syssrc/sys/dev/pci/if_bge.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.