Subject: CVS commit: syssrc/sys/arch
To: None <>
From: Jason R Thorpe <>
List: source-changes
Date: 04/10/2002 01:37:04
Module Name:	syssrc
Committed By:	thorpej
Date:		Tue Apr  9 22:37:04 UTC 2002

Modified Files:
	syssrc/sys/arch/acorn32/acorn32: rpc_machdep.c
	syssrc/sys/arch/arm/arm32: pmap.c
	syssrc/sys/arch/arm/include/arm32: pmap.h
	syssrc/sys/arch/arm/mainbus: mainbus_io.c
	syssrc/sys/arch/evbarm/iq80310: obio_space.c
	syssrc/sys/arch/hpcarm/hpcarm: hpc_machdep.c
	syssrc/sys/arch/hpcarm/sa11x0: sa11x0_io.c

Log Message:
* Split pte_cache_mode into pte_l1_s_cache_mode, pte_l2_l_cache_mode,
  and pte_l2_s_cache_mode.  The cache-meaningful bits are different
  for these descriptor types on some processor models.
* Add pte_*_cache_mask, corresponding to each above, which has a mask
  of the cache-meangful bits, and define those for generic and XScale
  MMU classes.  Note, the L2_S_CACHE_MASK_xscale definition requires
  use of the Extended Small Page L2 descriptor (the "X" bit overlaps
  with AP bits otherwise).

To generate a diff of this commit:
cvs rdiff -r1.32 -r1.33 syssrc/sys/arch/acorn32/acorn32/rpc_machdep.c
cvs rdiff -r1.85 -r1.86 syssrc/sys/arch/arm/arm32/pmap.c
cvs rdiff -r1.48 -r1.49 syssrc/sys/arch/arm/include/arm32/pmap.h
cvs rdiff -r1.9 -r1.10 syssrc/sys/arch/arm/mainbus/mainbus_io.c
cvs rdiff -r1.4 -r1.5 syssrc/sys/arch/evbarm/iq80310/obio_space.c
cvs rdiff -r1.44 -r1.45 syssrc/sys/arch/hpcarm/hpcarm/hpc_machdep.c
cvs rdiff -r1.10 -r1.11 syssrc/sys/arch/hpcarm/sa11x0/sa11x0_io.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.