Module Name:	syssrc
Committed By:	thorpej
Date:		Wed Oct 24 17:27:11 UTC 2001

Modified Files:
	syssrc/sys/arch/algor/algor [thorpej-mips-cache]: bus_dma.c
	syssrc/sys/arch/algor/include [thorpej-mips-cache]: bus.h
	syssrc/sys/arch/algor/isa [thorpej-mips-cache]: isadma_bounce.c

Log Message:
Adapt to new cache code.  bus_dmamap_sync() is now optimized for
virtually-indexed write-back caches.


To generate a diff of this commit:
cvs rdiff -r1.4 -r1.4.2.1 syssrc/sys/arch/algor/algor/bus_dma.c
cvs rdiff -r1.4 -r1.4.4.1 syssrc/sys/arch/algor/include/bus.h
cvs rdiff -r1.1 -r1.1.6.1 syssrc/sys/arch/algor/isa/isadma_bounce.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.