Subject: CVS commit: syssrc/sys/arch/mips
To: None <>
From: UCHIYAMA Yasushi <>
List: source-changes
Date: 10/16/2001 19:31:41
Module Name:	syssrc
Committed By:	uch
Date:		Tue Oct 16 16:31:40 UTC 2001

Modified Files:
	syssrc/sys/arch/mips/conf: Makefile.mips
	syssrc/sys/arch/mips/include: cpu.h cpuregs.h locore.h pcb.h proc.h
	syssrc/sys/arch/mips/mips: fpemu.c locore.S locore_mips3.S
	    mips_machdep.c trap.c vm_machdep.c
Added Files:
	syssrc/sys/arch/mips/include/r5900: cpuregs.h locore.h
	syssrc/sys/arch/mips/mips/r5900: locore_r5900.S r5900_machdep.c

Log Message:
R5900 support.
	In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
	if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
	mask interrupt directly ICU instead of SR.IM.
	I've added this feature to support software interrupt for R5900.
	and this option may be useful for platform which has cascaded ICU.

To generate a diff of this commit:
cvs rdiff -r1.19 -r1.20 syssrc/sys/arch/mips/conf/Makefile.mips
cvs rdiff -r1.55 -r1.56 syssrc/sys/arch/mips/include/cpu.h
cvs rdiff -r1.46 -r1.47 syssrc/sys/arch/mips/include/cpuregs.h
cvs rdiff -r1.56 -r1.57 syssrc/sys/arch/mips/include/locore.h
cvs rdiff -r1.11 -r1.12 syssrc/sys/arch/mips/include/pcb.h
cvs rdiff -r1.12 -r1.13 syssrc/sys/arch/mips/include/proc.h
cvs rdiff -r0 -r1.1 syssrc/sys/arch/mips/include/r5900/cpuregs.h \
cvs rdiff -r1.6 -r1.7 syssrc/sys/arch/mips/mips/fpemu.c
cvs rdiff -r1.23 -r1.24 syssrc/sys/arch/mips/mips/
cvs rdiff -r1.123 -r1.124 syssrc/sys/arch/mips/mips/locore.S
cvs rdiff -r1.70 -r1.71 syssrc/sys/arch/mips/mips/locore_mips3.S
cvs rdiff -r1.118 -r1.119 syssrc/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -r1.163 -r1.164 syssrc/sys/arch/mips/mips/trap.c
cvs rdiff -r1.83 -r1.84 syssrc/sys/arch/mips/mips/vm_machdep.c
cvs rdiff -r0 -r1.1 syssrc/sys/arch/mips/mips/r5900/locore_r5900.S \

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.