Subject: CVS commit: pkgsrc
To: None <>
From: Dan McMahill <>
List: source-changes
Date: 10/27/2000 06:59:48
Module Name:	pkgsrc
Committed By:	dmcmahill
Date:		Fri Oct 27 03:59:48 UTC 2000

Modified Files:
	pkgsrc/cad/verilog-current: Makefile
	pkgsrc/cad/verilog-current/files: md5 patch-sum
	pkgsrc/cad/verilog-current/patches: patch-ad
	pkgsrc/cad/verilog-current/pkg: PLIST
Removed Files:
	pkgsrc/cad/verilog-current/patches: patch-ab

Log Message:
update to 20001021 snapshot of verilog-current

from the authors announcement:

The loadable target module API is starting to take shape.

That is the major thrust nowadays with Icarus Verilog, after all, so
progress is being made here. The biggest change is in fact a philosophy
change. The target module now needs only a single symbol -- target_design --
to receive the whole design. The target module can from there and using
the API access the entire design randomly. So if you wanted to implement
a graphical browser, you could:-)

I've added support for the l-values of procedural assignments, and also
back pointers to objects that reference ivl_nexus_t objects. This closes
the loop so that there should be no dead-ends in the design.

I've clarified and expanded the descriptions in the ivl_target.h header
file. There should be just about enough documentation to properly used
all the various types. (Have any of you tried to write GIMP plug-ins?
Have you looked at the libgimp header files? Have you seen any comments
there?-( I won't ever sink to that level, I hope.)

I've also imtegrated updates to the Cygwin32 port to support loadable
targets under Cygwin32. After much struggling, Venkat managed to discover
the secret magic needed to get load time symbol binding to work. Hopefully
I didn't break it too bad when I changed the API again. (I think it is
still fine.)

To generate a diff of this commit:
cvs rdiff -r1.7 -r1.8 pkgsrc/cad/verilog-current/Makefile
cvs rdiff -r1.7 -r1.8 pkgsrc/cad/verilog-current/files/md5
cvs rdiff -r1.8 -r1.9 pkgsrc/cad/verilog-current/files/patch-sum
cvs rdiff -r1.1 -r0 pkgsrc/cad/verilog-current/patches/patch-ab
cvs rdiff -r1.6 -r1.7 pkgsrc/cad/verilog-current/patches/patch-ad
cvs rdiff -r1.4 -r1.5 pkgsrc/cad/verilog-current/pkg/PLIST

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.