Subject: CVS commit: syssrc
To: None <source-changes@netbsd.org>
From: Soren S. Jorvang <soren@netbsd.org>
List: source-changes
Date: 06/06/2000 10:41:12
Module Name:	syssrc
Committed By:	soren
Date:		Tue Jun  6 17:41:12 UTC 2000

Modified Files:
	syssrc/sys/arch/mips/include: locore.h
	syssrc/sys/arch/mips/mips: locore_mips3.S

Log Message:
Rename RM5200 cache ops to mips3_*_2way in anticipation of using them
for other CPUs with 2-way set associative L1 caches as well.


To generate a diff of this commit:
cvs rdiff -r1.33 -r1.34 syssrc/sys/arch/mips/include/locore.h
cvs rdiff -r1.31 -r1.32 syssrc/sys/arch/mips/mips/locore_mips3.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.