Subject: CVS commit: syssrc
To: None <firstname.lastname@example.org>
From: Jason R Thorpe <email@example.com>
Date: 02/01/2000 10:49:06
Module Name: syssrc
Committed By: thorpej
Date: Tue Feb 1 18:49:05 UTC 2000
Fix a bug in cpu_switch() introduced with the MIPSX_CPU_IDLE changes; we
have a 1 instruction delay after a load before the register contents are
valid on the R2000/R3000.
To generate a diff of this commit:
cvs rdiff -r1.86 -r1.87 syssrc/sys/arch/mips/mips/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.